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TRIDDS-3200 is a direct digital synthesizer module built on a combination of a modern high-speed 14-bit DAC and Kintex-7 FPGA. This synthesizer requires a 3.2 GHz clock frequency and features a specified output frequency range from DC to 600 MHz (usable up to 1.5 GHz with slightly degraded spur and output power performance). If the clock is supplied from a corresponding low phase noise source the synthesizer will provide an output signal with phase noise as low as -146 dBc/Hz (at 10 kHz offset from a 500 MHz carrier). The main advantage of the TRIDDS-3200 which places it truly apart from its commercially available counterparts (e.g. AD9914) is its unique spur performance. In the frequency range from DC to 600 MHz the TRIDDS-3200 generates a clean output spectrum with no spurs exceeding -90 dBc due to a sophisticated spur cancellation algorithm (activated by default, can be disabled at user’s discretion). Even at frequencies around Fclk/N which are traditionally contaminated with high order spurs in commercial DDS chips, the TRIDDS-3200 features no spurs higher than -90 dBc. The module is equipped with USB, SPI and parallel control interfaces. The switching speed is around 15 ns between any two frequencies if the unit is controlled via the parallel interface. Despite such tuning agility a continuous phase is preserved during any frequency transitions. The unit can be optionally upgraded to provide any custom modulation within an entire 600 MHz bandwidth. The output power is >+10 dBm across the specified frequency range. The TRIDDS-3200 comes in a robust aluminum milled case and operates over the frequency range of 0…+50°C. The module draws 1500 mA from a 9 V power supply and needs to be mounted on a conductive heat sink.

 

PERFORMANCE CHARACTERISTICS

Frequency Range DC — 600 MHz (usable up to 1500 MHz)
Frequency Step 0.000001 Hz
Clock Frequency 3200 MHz
 Output Power  >+10 dBm
Output Impedance 50 Ohm
Output VSWR <2:1
Harmonics <-30 dBc
  SSB Phase Noise Performance
provided a sufficiently low-phase noise clock source is used
Frequency offset Fm Residual SSB Phase Noise
100 MHz Carrier 500 MHz Carrier
1 Hz -70 dBc/Hz -56 dBc/Hz
10 Hz -105 dBc/Hz -91 dBc/Hz
100 Hz -135 dBc/Hz -121 dBc/Hz
1 kHz -150 dBc/Hz -136 dBc/Hz
10 kHz -160 dBc/Hz -146 dBc/Hz
100 kHz -165 dBc/Hz -151 dBc/Hz
1 MHz -170 dBc/Hz -156 dBc/Hz
Spurs <-90 dBc
Switching Speed 15 ns
Real-time Update Rate
(via the parallel interface)
>400 MB/s (48-bit tuning word)
Power Supply Voltage +9 V
Current Consumption 1500 mA
Operating Temperature Range 0...+50ºC
Clock IN / Output Connectors SMA (f)
Control Connectors USB mini B (receptacle),
SPI (14 pin, 2.0 mm pitch, Molex 878331421),
parallel (50 pin, 1.27 pitch, TE Connectivity 5-104069-2)
Power Supply Connector TE Connectivity 2-1445098-4
Dimensions Milled Aluminum Case 178 mm x 130 mm x 18 mm
 

PHASE NOISE PLOTS

Typical SSB Phase Noise Plot at 250 MHz

Typical SSB Phase Noise Plot at 350 MHz

Typical SSB Phase Noise Plot at 500 MHz

 

SPUR SUPPRESSION ALGORITHM

Spurs with Cancellation Algorithm OFF and ON (FOUT = FCLK/7+dF, Wide Span)

Spurs with Cancellation Algorithm OFF and ON (FOUT = 500.48 MHz, 20 MHz Span)